Reliability is a key concern in VLSI systems and transient/intermittent faults, often caused by soft errors, require designers to create special mitigation techniques. This book describes such techniques, spanning all levels of the design flow, to reduce systematically the vulnerability of VLSI systems to soft errors. Readers will be enabled to address soft error issues early in their design flow, allowing them to weigh the implications of dedicating more resources for soft error detection and prevention, against the correlating impact on delay, power and area.