The book provides accurate FDTD
models for on-chip interconnects, covering most recent advancements in
materials and design. Furthermore, depending on the geometry and physical
configurations, different electrical equivalent models for CNT and GNR based
interconnects are presented. Based on the electrical equivalent models the
performance comparison among the Cu, CNT and GNR-based interconnects are also
discussed in the book. The proposed models are validated with the HSPICE
simulations.

The book introduces the current
research scenario in the modeling of on-chip interconnects. It presents the
structure, properties, and characteristics of graphene based on-chip
interconnects and the FDTD modeling of Cu based on-chip interconnects. The
model considers the non-linear effects of CMOS driver as well as the
transmission line effects of interconnect line that includes coupling
capacitance and mutual inductance effects. In a more realistic manner, the
proposed model includes theeffect of width-dependent MFP of the MLGNR while
taking into account the edge roughness.