Springer Sivumäärä: 206 sivua Asu: Kovakantinen kirja Painos: 2012 Julkaisuvuosi: 2011, 15.12.2011 (lisätietoa) Kieli: Englanti
This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation.
Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip;
Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues;
Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC.
From the Foreword:
Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers.
