Modeling, Synthesis, and Rapid Prototyping with the VERILOG (TM) HDL, Michael D. Ciletti

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Modeling, Synthesis, and Rapid Prototyping with the VERILOG (TM) HDL

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Sivumäärä: 760 sivua
Asu: Kovakantinen kirja
Julkaisuvuosi: 1999, 08.03.1999 (lisätietoa)
Kieli: Englanti

Designed for advanced undergraduate and graduate computer science, computer engineering and electrical engineering courses in digital design and hardware description languages, this textbook presents an integrated treatment of the Verilog hardware description language (HDL) and its use in VLSI, circuit modeling/design, synthesis, and rapid prototyping.
This product is a selection from the Xilinx Design Series.

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