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Design and Test Strategies for 2D/3D Integration for NoC-based Multicore Architectures
49,60 €
Springer
Sivumäärä: 162 sivua
Asu: Pehmeäkantinen kirja
Julkaisuvuosi: 2021, 10.01.2021 (lisätietoa)
Kieli: Englanti

This book covers various aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems.  It gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling for NoC-based multicores. The authors describe the use of the Integer Line Programming (ILP) technique for smaller benchmarks and a Particle Swarm Optimization (PSO) to get a near optimal mapping and test schedule for bigger benchmarks. The PSO-based approach is also augmented with several innovative techniques to get the best possible solution. The tradeoff between performance (communication or test time) of the system and thermal-safety is also discussed, based on designer specifications.  

  • Provides a single-source reference to design and test for circuit and system-level approaches to (NoC) based multicore systems;
  • Gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling in (NoC) based multicore systems;
  • Organizes chapters systematically and hierarchically, rather than in an ad hoc manner, covering aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems.




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Helsinki
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Tampere
Design and Test Strategies for 2D/3D Integration for NoC-based Multicore Architectures
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ISBN:
9783030313128
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