Class A and class AB operational amplifiers are an essential part of a mixed- signal chip, where they are used as active filter sub-blocks, compensators, reference current generators and voltage buffers, to name just a few of many applications. For analog circuits such as operational amplifiers a mixed-signal chip is a very unfriendly operating environment, where the power supply is often corrupted by high current switching circuits. In addition, power supply voltages for analog blocks are shrinking, because of the deployment of new battery technologies and fine line length integrated circuit processes, which can reduce the amplifier dynamic range a problem requiring supply insensitive low voltage compatible amplifier topologies and other analog blocks.

The aims of this thesis were to further develop the low voltage compatible class AB amplifier topologies published earlier by other authors, to improve their bandwidth efficiency by means of re-examining two- and three-stage amplifier compensation techniques and to find solutions for enhancing the high frequency power supply noise rejection performance of class A and class AB amplifiers without degrading their signal path stability.

The class AB amplifier cores presented here improve the amplifier’s power supply noise insensitivity at high frequencies and increase bandwidth efficiency when compared to the commonly used two-stage Miller compensated amplifier, enabling the construction of better buffers and more power-efficient and reliable low voltage mixed signal chips.