In the future, because fundamental materials and process limits are being approached, continued transistor scaling will not be as straightforward. Future complementary metal-oxide semiconductor (MOS) transistors will require high-permittivity (high-k) gate dielectrics and metal gate electrodes, as well as low-resistance ultrashallow junctions, in order to meet the stringent specifications of the International Technology Roadmap for Semiconductors. Techniques to improve transconductance and drive current may also be required. Process integration issues must be solved, and reliability must be assured, before any new material or processing technique can be used in IC manufacture. A further complication is that the key challenges will differ according to application. This book reports research results from industry, government labs and academia covering a wide scope of front-end process issues for future CMOS technologies. Topics include: advanced materials and structures; high-k dielectrics; advanced gate stack materials; heterogeneous integration and strained Si technologies; ultrashallow junction technology; strained Si and source/drain technology; and laser annealing and silicide processes.