Tekijä: Jayaraman J. Thiagarajan; Karthikeyan Natesan Ramamurthy; Pavan Turaga; Andreas Spanias Kustantaja: Morgan & Claypool Publishers (2014) Saatavuus: | Arvioimme, että tuote lähetetään meiltä noin 1-3 viikossa
Tekijä: Henry Braun; Pavan Turaga; Andreas Spanias; Sameeksha Katoch; Suren Jayasuriya; Cihan Tepedelenlioglu Kustantaja: Morgan & Claypool Publishers (2019) Saatavuus: | Arvioimme, että tuote lähetetään meiltä noin 1-3 viikossa
Tekijä: Henry Braun; Pavan Turaga; Andreas Spanias; Sameeksha Katoch; Suren Jayasuriya; Cihan Tepedelenlioglu Kustantaja: Morgan & Claypool Publishers (2019) Saatavuus: | Arvioimme, että tuote lähetetään meiltä noin 1-3 viikossa
Springer Sivumäärä: 131 sivua Asu: Kovakantinen kirja Painos: 2004 Julkaisuvuosi: 2004, 29.02.2004 (lisätietoa) Kieli: Englanti
Floating Gate Devices: Operation and Compact Modeling focuses on standard operations and compact modeling of memory devices based on Floating Gate architecture. Floating Gate devices are the building blocks of Flash, EPROM, EEPROM memories. Flash memories, which are the most versatile nonvolatile memories, are widely used to store code (BIOS, Communication protocol, Identification code,) and data (solid-state Hard Disks, Flash cards for digital cameras,). The reader, who deals with Floating Gate memory devices at different levels - from test-structures to complex circuit design - will find an essential explanation on device physics and technology, and also circuit issues which must be fully understood while developing a new device. Device engineers will use this book to find simplified models to design new process steps or new architectures. Circuit designers will find the basic theory to understand the use of compact models to validate circuits against process variations and to evaluate the impact of parameter variations on circuit performances. Floating Gate Devices: Operation and Compact Modeling is meant to be a basic tool for designing the next generation of memory devices based on FG technologies.
