Yong Zhao; Jing Lei; Guofang Li; Ming Fang He; Kaori Okano; Nagwa Megahed; David Gamage; Hema Ramanathan Taylor & Francis Inc (2010) Saatavuus: Tilaustuote Kovakantinen kirja
Yong Zhao; Jing Lei; Guofang Li; Ming Fang He; Kaori Okano; Nagwa Megahed; David Gamage; Hema Ramanathan Taylor & Francis Inc (2010) Saatavuus: Painos loppu Pehmeäkantinen kirja
Hua Wang; Lei Zou; Guangyan Huang; Jing He; Chaoyi Pang; Haolan Zhang; Dongyan Zhao; Zhuang Yi Springer-Verlag Berlin and Heidelberg GmbH & Co. KG (2012) Saatavuus: Tilaustuote Pehmeäkantinen kirja
Yanchun Zhang; Guiqing Yao; Jing He; Lei Wang; Neil R. Smalheiser; Xiaoxia Yin Springer International Publishing AG (2014) Saatavuus: Tilaustuote Pehmeäkantinen kirja
Zhang-Dui Zhong; Bo Ai; Gang Zhu; Hao Wu; Lei Xiong; Fang-Gang Wang; Lei Lei; Jian-Wen Ding; Ke Guan; Rui-Si He Springer (2017) Saatavuus: Tilaustuote Kovakantinen kirja
Model order reduction (MOR) techniques reduce the complexity of VLSI designs, paving the way to higher operating speeds and smaller feature sizes. This book presents a systematic introduction to, and treatment of, the key MOR methods employed in general linear circuits, using real-world examples to illustrate the advantages and disadvantages of each algorithm. Following a review of traditional projection-based techniques, coverage progresses to more advanced MOR methods for VLSI design, including HMOR, passive truncated balanced realization (TBR) methods, efficient inductance modeling via the VPEC model, and structure-preserving MOR techniques. Where possible, numerical methods are approached from the CAD engineer's perspective, avoiding complex mathematics and allowing the reader to take on real design problems and develop more effective tools. With practical examples and over 100 illustrations, this book is suitable for researchers and graduate students of electrical and computer engineering, as well as practitioners working in the VLSI design industry.