Taylor & Francis Inc Sivumäärä: 386 sivua Asu: Kovakantinen kirja Painos: 1 Julkaisuvuosi: 2009, 25.03.2009 (lisätietoa) Kieli: Englanti
The implementation of networks-on-chip (NoC) technology in VLSI integration presents a variety of unique challenges. To deal with specific design solutions and research hurdles related to intra-chip data exchange, engineers are challenged to invoke a wide range of disciplines and specializations while maintaining a focused approach.
Leading Researchers Present Cutting-Edge Designs Tools Networks-on-Chips: Theory and Practice facilitates this process, detailing the NoC paradigm and its benefits in separating IP design and functionality from chip communication requirements and interfacing. It starts with an analysis of 3-D NoC architectures and progresses to a discussion of NoC resource allocation, processor traffic modeling, and formal verification, with an examination of protocols at different layers of abstraction.
An exploration of design methodologies, CAD tool development, and system testing, as well as communication protocol, the text highlights important emerging research issues, such as
Resource Allocation for Quality of Service (QoS) on-chip communication
Testing, verification, and network design methodologies
Architectures for interconnection, real-time monitoring, and security requirements
Networks-on-Chip Protocols
Presents a flexible MPSoC platform to easily implement multimedia applications and evaluate future video encoding standards
This useful guide tackles power and energy issues in NoC-based designs, addressing the power constraints that currently limit the embedding of more processing elements on a single chip. It covers traffic modeling and discusses the details of traffic generators.
Using unique case studies and examples, it covers theoretical and practical issues, guiding readers through every phase of system design.
